highperformance10gb_spinandapdopticalreceivers-外文文献(编辑修改稿)

highperformance10gb_spinandapdopticalreceivers-外文文献(编辑修改稿)内容摘要：

al outputs of the TIA chip are wirebonded to coupled microstrip lines on the electrical substrate, as opposed to a single 50 !2 microstrip in the case of the mm connectorized module. The coupled microstrips are designed to have a 50 C2 impedance, which is optimized for an odd mode of transmission, due to the differential signals, which are 180 degrees out of phase. The physical module design presented in this section discussed several soldering operations, which are used in the fabrication of such a module. In certain applications, the use of solder as opposed to epoxy is preferred to reduce or eliminate outgassing and to improve mechanical strength, and the reliability of the optical assembly. pin Photodetectors Our pin photodiode is a doubleheterojunction structure grown on an n+InP substrate and consists of an n+ 1nP buffer layer, an nInGaAs active layer, and ann InP cap layer. The buffer growth precedes the active layer growth to provide a surface with fewer defects than exist on the bare substrate surface. The In,Gq,As active layer is latticematched to InP and, with a handgap E~ eV, is sensitive to light with wavelengths shorter than pm. The device exhibits a shortwavelength cutoff at pm since more energetic shortwavelength light is absorbed in the InP (E~ eV) before it reaches the InGaAs. The largerbandgap InP cap layer reduces surface leakage (relative to InGaAs) and is passivated using Si,N,. Using etched patterns in the Si,N, as a mask, highreliability planar diodes are created by diffusing a ptype dopant (Zn) to form onesided p39。 n junctions just below the InPInGaAs (capactive) heterojunction (see Fig. sa). Contact metallization alloyed to the diffused junction allows electrical contact to the pside of the junction. After thinning the substrate to 120 pm, the back side of the wafer is metallized to provide electrical connection to the nside of the junction. Apertures in the backside metallization allow optical coupling to the active region in a hackilluminated geometry, and an antireflecting (AR) Si,N, coating is present in the aperture to eliminate reflection from the airInP interface. Several of the critical device characteristics pose conflicting design constraints that must be optimized for good high frequency performance. Of primary importance is the ability to achieve sufficient 3dB bandwidth. The standard p in diode has two fundamental bandwidth limitations: (i) finite carrier transit time and (ii) RC rolloff. The finite transit time taken by photoninduced carriers to traverse the active region can be shortened by reducing the thickness of the active region, but only at the expense of increased capacitance per unit area and lower quantum efficiency (which results in lower responsivity). The tendency towards increased capacitance for thinner active layers can he offset by reducing the total junction area, but this leads to greater difficulties in achieving high optical coupling efficiency and reliable electrical connections (., by wire bonding). For IO Gb/s performance, the conflicting requirements just described can be adequately resolved using a device diameter of 30 pm, In this case, an active layer width W, pm gives rise to average transit times of about 25 ps implying a maximum bandwidth 18 GHz. The resulting capacitance of pF contributes a bandwidth limitation of 209 1999 Electronic Components and Technology Conference f3d8 21 GHz assuming a 50 Q load. mote that low contact resistance is yet another device requirement necessary for minimizing RC bandwidth limitations.) Direct measurement of a wirebonded photodiode using microwave probes has confirmed a device bandwidth of 20 GHz [4]. Finally, assuming an AR coating reduces surface reflections to negligible levels, the quantum efficiency, q of such a device is still reasonably high: q = [l exp(aW.)] 80% where the 3 2o = .S e I Lp absorption coefficient a pm39。 for n 1nGaAs [SI and a wavelength of pm. Measured dc responsivities exceed 1 10 100 1 AIW at both and um. Gain Factor M Avalanche Photodetectors The design of an avalanche photodiode for use at IO Gb/s is considerably more difficult than for a pin diode, but the benefits to receiver sensitivity can be substantial. The utility of the APD is that it provides a means of circumventing the basic quantum limitation of the p1n diode, which dictates that each photon can generate only a single electronhole pair. The APD structure is designed to create a region of electric field sufficiently high that a single carrier is accelerated enough to generate additional electronhole pairs through impact ionization. Newly generated carriers are similarly accelerated, and so a single carrier can trigger an avalanche effect, which provides internal gain resulting in many electronhole pairs generated per absorbed photon. All InGaAsInP APDs employ a separate absorption and multiplication (SAM) structure (see Fig. 5b) since high fields in the InGaAs absorption region would induce large tunneling currents before the onset of the avalanche effect. The low doped InGaAs absorption and InP multiplication regions are spatially separated by a layer of ndoped InP used to maintain low field in the InGaAs and high field in the InP. The InP multiplication region is terminated by a p+n junction in InP created by a diffusion technique similar to that used in fabricating prn diodes. The polarity of the device is determined by the fact that holes have a higher probability than electrons for ionizing collisions in InP。 therefore, the structure is designed to inject photoexcited holes from the InGaAs into the InP multiplication region to seed the (a)@ photodiode (b) avalanche photodiode iln。